module Mem:sig..end
Note. All multi-bytes memory accesses are done in little endian
order.
typeaddr =nativeint
val (+) : addr -> addr -> addra + off adds off to a.val (-) : addr -> addr -> addra - off subracts off to a.val offset : addr -> int -> addroffset addr n is add + Nativeint.of_int n.val of_int32 : int32 -> addrof_int32 i is the address corresponding to i.val pp_addr : Format.formatter -> addr -> unitpp_addr ppf a prints and unspecified reprsentation of a
on ppf.val wait : int -> unitwait n waits at least n CPU cycles.val dsb : unit -> unitdsb () performs a data synchronization barrier. Returns when
all instructions before the call are complete.val dmb : unit -> unitdmb () performs a data memory barrier. Ensures that all explicit
memory access before the call complete before any new explicit
access made after the call.val isb : unit -> unitisb () performs an instruction synchronization barrier. Flushes
the pipeline in the processor so that all instruction following the
call are fetched from cache or memory.val get : addr -> intget a gets the byte at address a.val get_int : addr -> intget_int a gets the 4 bytes starting at address a.
Warning. Truncates the value of the 32nd bit.
val get_int32 : addr -> int32get_int32 a gets the 4 bytes starting at address a.val get_int64 : addr -> int64get_int64 a gets the 8 bytes starting at address a.val set : addr -> int -> unitset a v sets the byte at address a to v.val set_int : addr -> int -> unitset a v sets the 4 bytes starting at address a to v.val set_int32 : addr -> int32 -> unitset a v sets the 4 bytes starting at address a to v.val set_int64 : addr -> int64 -> unitset a v sets the 8 bytes starting at address a to v.val set_bits : addr -> bits:int -> int -> unit
val set_int_bits : addr -> bits:int -> int -> unit
val set_int32_bits : addr -> bits:int32 -> int32 -> unit
val set_int64_bits : addr -> bits:int64 -> int64 -> unit
module Map:sig..end